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pnCCD Working Principles

A back-illuminated, fully depleted CCD architecture designed for fast, low-noise, energy-resolving detection.

The pnCCD (pn-type Charge-Coupled Device) is a specialised CCD sensor architecture developed for demanding radiation detection tasks. It measures charge created by individual photon interactions and transfers that charge through the silicon using controlled bias potentials.

What distinguishes the pnCCD from a conventional CCD is not the basic charge-coupled principle, but the combination of sensor design, charge transport, and readout architecture. These choices enable high speed, excellent low-energy response, and precise signal measurement without the compromises typically required in serial CCD readout designs.

Sensor structure and charge transport

The pnCCD is a back-illuminated CCD built on a fully depleted silicon substrate. Incoming radiation enters through a very thin pn-window on the back side of the sensor.

This structure provides:

  • Minimal dead layers at the entrance surface

  • Excellent sensitivity at low photon energies

  • High and uniform charge collection efficiency

  • Good radiation hardness and long-term stability

Charge transport within the sensor is controlled by pn-junction based potential wells rather than purely surface channels. By applying suitable bias voltages, charge packets are guided through the depleted bulk and transferred between pixels in a controlled and repeatable way.

 

Key Points:

  • Charge is generated in the bulk and collected by drift

  • Charge sharing between pixels is intrinsic and expected

  • Charge transfer is performed by shifting potential wells via applied biases

Massively parallel column readout

Unlike a conventional CCD, which relies on serial registers, the pnCCD reads out entire columns in parallel.

Each column terminates in an integrated JFET amplifier, converting the collected charge into a voltage signal directly at the sensor edge. These column signals are then processed by dedicated CAMEX (CMOS Amplifier and Multiplexer) ASICs, enabling stable, low-noise readout of many channels simultaneously.

To further increase throughput, the sensor is logically split at its centre:

  • One half of the columns is read out towards one side

  • The other half is read out towards the opposite side

  • There is no physical split in the silicon

In practical terms, this means:

  • Full columns are read out at once

  • 264 pixels per column per side

  • 528 pixels read out simultaneously across the sensor

 

Key Points:

  • No serial readout bottleneck

  • Shorter charge transfer distances

  • High speed without forcing high-noise operation

 

Frame-store readout and split-frame transfer

Even with parallel readout, precise signal measurement is slower than charge transfer. The pnCCD therefore uses a frame-store architecture.

The sensor includes:

  • an active image area, and

  • shielded frame-store regions

At the end of an exposure:

  • The complete image is transferred rapidly into the frame store (T_shift)

  • The active area immediately begins collecting the next frame

  • The stored frame is read out slowly and precisely

 

To minimise transfer time, the pnCCD operates in split-frame mode:

  • Half of the image shifts towards one frame-store region

  • Half shifts towards the opposite region

This keeps T_shift short and uniform across the sensor.

 

What this enables

  • Overlap of integration and readout

  • No dead time between frames

  • Strong suppression of signal collected during transfer (“out-of-time” contribution)

  • High precision readout without limiting acquisition speed

In simple terms: The pnCCD reads out the previous frame carefully while already capturing the next one.

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